Product Profile of Memory and Port Address Decoder Interface
System Automation Group supplies Memory and Port Address Decoder Interface. System Automation Group offers a wide range of software and automation products like CPU, FPU, PLC, AC/DC Motor Control, communication chips, display controllers and peripherals. The Memory and Port Address Decoder Interface finds application in FPGA or ASIC based embedded systems and provides for flexible base address selection, required for add-on cards, such as display and disk adapters, sound cards etc.
Key Features of Memory and Port Address Decoder Interface
- Any number of segments - memory and I/O
- Unlimited segment depth - from zero up
- Segment Lock - maintains positional association between input and output even when a segment is unused.
- Decodes sub-segments within each main segment.
- May be used as part of an SOPC or as a discrete device.
- May be used with multiple bus masters such as with DMA and multiple CPUs.
- Provides registered or combinatorial outputs.
- Interface with any kind of CPU or microcontroller.
- Makes it easy to use every bit of FPGA memory - normally a difficult task
- User configurable base address - Flexible width, position and value, for use in systems with add-on cards.
- Interface with internal and/or external peripherals
- Active Hi and Active Lo outputs.
- Supports I/O mapped memory
